The subject matter of the present application relates to a microelectronic assembly including a plurality of microelectronic elements and, in particular, a microelectronic assembly including a reconstituted wafer level package of microelectronic elements and to methods of fabricating the assembly.
Semiconductor chips are flat bodies with contacts disposed on a front surface that are connected to internal electrical circuitry of the chip. The chips are typically packaged to form a microelectronic package having terminals that are electrically connected to the chip contacts. The terminals of the package may then be connected to an external microelectronic component, such as a circuit panel.
It is often desirable to include a plurality of chips in a microelectronic assembly. The chips in the assembly, for example, may be part of a microelectronic package fabricated by encapsulating a plurality of chips, which have been cut from a semiconductor wafer into individual chips, in a molded structure commonly known as a reconstituted or embedded wafer level package. The element contacts of the chips typically have a shape of a substantially uniform radial dimension, such as a circle, square, etc. In addition, the element contacts desirably are arranged on a front face of the chip spaced from each other at a very fine pitch, which in some examples is typically 10-80 microns.
The microelectronic assembly, which is to include such reconstituted chip package, usually contains an interconnection structure having interconnection elements arranged to contact the element contacts of the chips of the package, so as to electrically interconnect the element contacts of a chip to each other or an element contact of one chip with an element contact of another chip of the package. As a result of the typical very fine pitch of the element contacts, highly accurate placement of the chips is needed during the process of encapsulating the chips within the package, to provide that the chips are fixed in position in the package so that the interconnection elements of the interconnection structure, which are arranged at positions according to an interconnection design layout for the assembly, contact a sufficient portion of an exposed surface area of the corresponding chip contacts to ensure reliable electrical interconnections therebetween.
Very high accuracy chip placement equipment that provides for chip placement according to typical pitches, however, is costly. Also, even when such equipment is used, a reconstituted package is not always obtained for which very fine interconnection elements, which have a pitch comparable to the pitch of the chip contacts, can be used to contact the corresponding chip contacts so as to form reliable electrical interconnections therebetween in accordance with the interconnection design layout for the microelectronic assembly including the package.
A typical interconnection structure for a microelectronic assembly is a silicon interposer, which is often used to electrically interconnect chip contacts to conductive elements of another element, such as a substrate, of the microelectronic assembly. The interconnection elements of the interposer include very small size microbumps on one surface which are to contact corresponding chip contacts, and larger conductive masses at a surface opposite the one surface that provide for an electrical interconnection between the chip contacts and contacts of the substrate. The microbumps typically have a diameter of 20 microns, and for example, may be arranged with a 40 micron pitch. The fabrication of an interposer with microbumps having the typical pitch, however, is difficult and costly, because each of the microbumps needs to be formed using only a very small amount of solder and often several metal layers, such as four or more, need to be used to form the electrical interconnections between the microbumps and the larger masses on the other side of the interposer. Thus, the use of an interposer in a microelectronic assembly may substantially increase the cost of the assembly, and the interposer also constitutes an extra component that increases the thickness of the assembly. Further, when a larger size interposer is used, the interposer may cause warping within the assembly, which adversely impacts the reliability of the connections between the microbumps and the chip contacts.
In addition, a microelectronic assembly including multiple chips can be fabricated using a wafer or portion thereof including multiple chips. Oftentimes, the number of chips desired for inclusion in a microelectronic assembly requires use of a large region or the entirety of a wafer, such that the size needs to be about 20 mm or greater in diameter. A wafer of such size, however, often may have a degree of warping, which results in the exposed surface areas of the chip contacts not being in a same plane. Consequently, contact of interconnection elements, such as the microbumps of the interposer, with a sufficient portion of the exposed surface area of the element contacts of the chips may be difficult to attain because of the warping of the wafer. As a result, manufacture of microelectronic assemblies including such large sized wafers can have a very low yield of microelectronic assemblies having reliable electrical interconnections between the chip contacts and other conductive elements of the microelectronic assembly.
Therefore, improvements are desirable in the art of producing a microelectronic assembly including a plurality of microelectronic elements that has an increased tolerance for misplacement of the microelectronic elements, such as within a reconstituted wafer level package contained in the assembly.